ELEC2310: Unit Outline
Up one levelCredit: 6 points. Availabillity: Semester 2. Old unit code: 623.219.
Contact Details
NOTE: Email addresses have been obscured - remove the '[' and ']' to make real addresses.
Unit Coordinator
- Herbert Iu, H. <herbert[@]ee[.]uwa[.]edu[.]au>
Lecturers
- Kevin Vinsen, K. <kvinsen[@]ee[.]uwa[.]edu[.]au>
Outcomes: Students gain skills in evaluating, experimenting with, and optimising the performance of computer architectures from single processors to parallel computers; understand the foundational concepts needed for learning about computer systems and describing the technological context of current computer organisations; and understand the foundation concepts of various classes of parallel computers, which is expanded to evaluating and optimising their performance.
Content: Topics include components of a computer, classification of computer architectures, Von Neumann and Harvard architectures, Flynn’s classification, benchmarking and performance measurement, instruction set architecture, CPU components, CPU internal buses, microprogramming, hardwired control, input/output (I/O), bus organisation, DMA I/O, memory-mapped I/O, memory systems, caches, virtual memory systems, memory speed and cost-performance issues, pipelining and RISCs, processor design and performance issues. Introduction to parallel computing, requirements for parallelism: data dependencies, precedence graphs, measuring parallelism: level, degree and granularity of parallelism, measurement of performance, speed-up laws, MIMD multiprocessing, SIMD computing, multi-pipeline systems and pipeline chaining, control and scheduling of arithmetic and instruction pipelines; inter-processor connection networks.